Quartus自动售货机VHDL代码仿真
名称:Quartus自动售货机VHDL代码仿真
软件:Quartus
语言:VHDL
代码功能:
自动售货机,三种币值、两种商品
注意定义和设计的合理性
FPGA代码Verilog/VHDL代码资源下载:www.hdlcode.com
演示视频:
设计文档:
1. 工程文件

2. 程序文件


3. 程序编译

4. RTL图(电路图)

状态机图

5. Testbench

6. modelsim仿真图
整体仿真图

按键模块仿真

控制模块
仿真分析:售货机控制模块仿真,下图select_p按下2次,最终选择了6元商品(select_num=6),再按下确认键(confirm_p=1)后开始投币,先后投币了1,10元,共11元(input_money=11),找零金额为refound_money=5。

数码管显示模块仿真

部分代码展示:
LIBRARY ieee; USE ieee.std_logic_1164.all; ENTITY auto_sell IS PORT ( clk_50M : IN STD_LOGIC;--50M时钟 reset_n : IN STD_LOGIC;--复位 select_key_n : IN STD_LOGIC;--商品选择按键--商品有3元6元的 confirm_key_n : IN STD_LOGIC;--确认按键 cancel_key_n : IN STD_LOGIC;--取消按键 coin_1_n : IN STD_LOGIC;--投币1元 coin_5_n : IN STD_LOGIC;--投币5元 coin_10_n : IN STD_LOGIC;--投币10元 buy_succeed : OUT STD_LOGIC;--购买成功 bit_select : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);--数码管位选 seg_select : OUT STD_LOGIC_VECTOR(7 DOWNTO 0)--数码管段选 ); END auto_sell; ARCHITECTURE trans OF auto_sell IS --售货控制模块 component sell_ctrl IS PORT ( clk : IN STD_LOGIC; reset_n : IN STD_LOGIC; confirm_p : IN STD_LOGIC; select_p : IN STD_LOGIC; concel_p : IN STD_LOGIC; coin_1_p : IN STD_LOGIC; coin_5_p : IN STD_LOGIC; coin_10_p : IN STD_LOGIC;--投币10元 buy_succeed : OUT STD_LOGIC; select_num : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); input_money : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); refound_money : OUT STD_LOGIC_VECTOR(3 DOWNTO 0) ); END component; --按键消抖模块 component key_jitter IS PORT ( clkin : IN STD_LOGIC; key_in : IN STD_LOGIC; key_negedge : OUT STD_LOGIC ); END component; --显示模块 component display IS PORT ( clk : IN STD_LOGIC; select_num : IN STD_LOGIC_VECTOR(3 DOWNTO 0); input_money : IN STD_LOGIC_VECTOR(3 DOWNTO 0); refound_money : IN STD_LOGIC_VECTOR(3 DOWNTO 0); bit_select : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); seg_select : OUT STD_LOGIC_VECTOR(7 DOWNTO 0) ); END component; SIGNAL select_num : STD_LOGIC_VECTOR(3 DOWNTO 0); SIGNAL input_money : STD_LOGIC_VECTOR(3 DOWNTO 0); SIGNAL refound_money : STD_LOGIC_VECTOR(3 DOWNTO 0); SIGNAL confirm_p : STD_LOGIC; SIGNAL select_p : STD_LOGIC; SIGNAL concel_p : STD_LOGIC; SIGNAL coin_1_p : STD_LOGIC; SIGNAL coin_5_p : STD_LOGIC; SIGNAL coin_10_p : STD_LOGIC; -- Declare intermediate signals for referenced outputs SIGNAL buy_succeed_buf : STD_LOGIC; SIGNAL bit_select_buf : STD_LOGIC_VECTOR(3 DOWNTO 0); SIGNAL seg_select_buf : STD_LOGIC_VECTOR(7 DOWNTO 0); BEGIN buy_succeed <= buy_succeed_buf; bit_select <= bit_select_buf; seg_select <= seg_select_buf; --调用按键消抖模块 i1_key_jitter : key_jitter PORT MAP ( clkin => clk_50M, key_in => select_key_n, key_negedge => select_p ); --调用按键消抖模块 i2_key_jitter : key_jitter PORT MAP ( clkin => clk_50M, key_in => confirm_key_n, key_negedge => confirm_p ); --调用按键消抖模块 i3_key_jitter : key_jitter PORT MAP ( clkin => clk_50M, key_in => cancel_key_n, key_negedge => concel_p ); --调用按键消抖模块 i4_key_jitter : key_jitter PORT MAP ( clkin => clk_50M, key_in => coin_1_n, key_negedge => coin_1_p ); --调用按键消抖模块 i6_key_jitter : key_jitter PORT MAP ( clkin => clk_50M, key_in => coin_5_n, key_negedge => coin_5_p ); --调用按键消抖模块 i7_key_jitter : key_jitter PORT MAP ( clkin => clk_50M, key_in => coin_10_n, key_negedge => coin_10_p ); --调用售货控制模块 i_sell_ctrl : sell_ctrl PORT MAP ( clk => clk_50M, reset_n => reset_n, confirm_p => confirm_p, select_p => select_p, concel_p => concel_p, coin_1_p => coin_1_p, coin_5_p => coin_5_p, coin_10_p => coin_10_p, buy_succeed => buy_succeed_buf, select_num => select_num, input_money => input_money, refound_money => refound_money ); --调用显示模块 i_display : display PORT MAP ( clk => clk_50M, select_num => select_num, input_money => input_money, refound_money => refound_money, bit_select => bit_select_buf, seg_select => seg_select_buf ); END trans;
代码文件(付费下载):
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